Venue: FIAS Hörsaal

On Tuesday, August 12, 2025, from 15:00 to 17:00 in the FIAS lecture hall, Prof. Dr. Estela Suárez (University of Bonn / Jülich Supercomputing Centre) will provide insights into current developments in high-performance computing. The lecture in English will shed light on how new architectures and code design strategies can be taken from prototype to productive use - and what role HPC plays in interaction with artificial intelligence.

Abstract 

High-performance computing (HPC) is a key driver of scientific progress, both on its own and in combination with artificial intelligence (AI) approaches. HPC and AI are strongly technology-driven, as they require access to cutting-edge processing, memory, and interconnect devices. They also rely on a deep software stack in which many complex packages must interact seamlessly with each other while continuously adapting to rapidly changing underlying hardware. Therefore, the interplay between hardware, system software, and application codes must be carefully orchestrated to achieve maximum performance and energy efficiency in HPC. This is especially important when considering new computing paradigms and architectures. In this seminar, I will present the various research directions in which together with my research group at the Jülich Supercomputing Centre we have been pushing new HPC ideas from the prototyping stage to production-level quality.

Details and further Information

Date: Tuesday, August 12, 2025
Time: 15:00–17:00
Venue: FIAS Lecture Hall, Ruth-Moufang-Straße 1, 60438 Frankfurt am Main
Speaker: Prof. Dr. Estela Suárez (University of Bonn / Jülich Supercomputing Centre)
Topic: High-Performance Computing – From Prototyping to Production-Level Quality
Language: English
Registration: Not required, free admission

The Speaker

Prof. Dr. Estela Suárez is Professor of High Performance Computing at the University of Bonn and Group Leader of the Jülich Supercomputing Centre. Her research focuses on the development of modular supercomputer architectures and codesign strategies. She coordinates the EU-funded DEEP projects and is active in initiatives such as the European Processor Initiative and as an observer in the Research and Innovation Advisory Group of the EuroHPC Joint Undertaking.